1diff -ur misc/nss-3.25/nss/lib/freebl/Makefile misc/build/nss-3.25/nss/lib/freebl/Makefile
2--- misc/nss-3.25/nss/lib/freebl/Makefile 2016-06-20 10:11:28.000000000 -0700
3+++ misc/build/nss-3.25/nss/lib/freebl/Makefile 2016-07-14 23:52:19.135925000 -0700
4@@ -153,8 +153,8 @@
5 # The Intel AES assembly code requires Visual C++ 2010.
6 # if $(_MSC_VER) >= 1600 (Visual C++ 2010)
7 ifeq ($(firstword $(sort $(_MSC_VER) 1600)),1600)
8- DEFINES += -DUSE_HW_AES -DINTEL_GCM
9- ASFILES += intel-aes-x86-masm.asm intel-gcm-x86-masm.asm
10+ #DEFINES += -DUSE_HW_AES -DINTEL_GCM
11+ #ASFILES += intel-aes-x86-masm.asm intel-gcm-x86-masm.asm
12 EXTRA_SRCS += intel-gcm-wrap.c
13 ifeq ($(CLANG_CL),1)
14 INTEL_GCM_CLANG_CL = 1
| 1--- misc/nss-3.14.4/mozilla/security/coreconf/Linux.mk 2013-11-01 14:39:28.195966851 +0100
2+++ misc/build/nss-3.14.4/mozilla/security/coreconf/Linux.mk 2013-11-01 14:39:10.246610849 +0100
3@@ -131,7 +131,7 @@
4 # -ansi on platforms like Android where the system headers are C99 and do
5 # not build with -ansi.
6 STANDARDS_CFLAGS = -D_POSIX_SOURCE -D_BSD_SOURCE -D_XOPEN_SOURCE
7-OS_CFLAGS = $(STANDARDS_CFLAGS) $(DSO_CFLAGS) $(OS_REL_CFLAGS) $(ARCHFLAG) -Wall -Werror-implicit-function-declaration -Wno-switch -pipe -DLINUX -Dlinux -DHAVE_STRERROR
8+OS_CFLAGS = $(STANDARDS_CFLAGS) $(DSO_CFLAGS) $(OS_REL_CFLAGS) $(ARCHFLAG) -Wall -Werror-implicit-function-declaration -Wno-switch -pipe -DLINUX -Dlinux -DHAVE_STRERROR -DHAVE_UNISTD_H
9 OS_LIBS = $(OS_PTHREAD) -ldl -lc
10
11 ifdef USE_PTHREADS
12--- misc/nss-3.14.4/mozilla/security/nss/lib/freebl/Makefile 2013-01-31 02:08:59.000000000 +0100
13+++ misc/build/nss-3.14.4/mozilla/security/nss/lib/freebl/Makefile 2014-01-10 13:57:48.000000000 +0100
14@@ -186,8 +186,8 @@
15 DEFINES += -DMP_CHAR_STORE_SLOW -DMP_IS_LITTLE_ENDIAN
16 # DEFINES += -DMPI_AMD64_ADD
17 # comment the next two lines to turn off intel HW accelleration
18- DEFINES += -DUSE_HW_AES
19- ASFILES += intel-aes.s intel-gcm.s
20+# DEFINES += -DUSE_HW_AES
21+# ASFILES += intel-aes.s intel-gcm.s
22 EXTRA_SRCS += intel-gcm-wrap.c
23 INTEL_GCM = 1
24 MPI_SRCS += mpi_amd64.c mp_comba.c
|