1diff -ur misc/nss-3.25/nss/lib/freebl/Makefile misc/build/nss-3.25/nss/lib/freebl/Makefile 2--- misc/nss-3.25/nss/lib/freebl/Makefile 2016-06-20 10:11:28.000000000 -0700 3+++ misc/build/nss-3.25/nss/lib/freebl/Makefile 2016-07-14 23:52:19.135925000 -0700 4@@ -153,8 +153,8 @@ 5 # The Intel AES assembly code requires Visual C++ 2010. 6 # if $(_MSC_VER) >= 1600 (Visual C++ 2010) 7 ifeq ($(firstword $(sort $(_MSC_VER) 1600)),1600) 8- DEFINES += -DUSE_HW_AES -DINTEL_GCM 9- ASFILES += intel-aes-x86-masm.asm intel-gcm-x86-masm.asm 10+ #DEFINES += -DUSE_HW_AES -DINTEL_GCM 11+ #ASFILES += intel-aes-x86-masm.asm intel-gcm-x86-masm.asm 12 EXTRA_SRCS += intel-gcm-wrap.c 13 ifeq ($(CLANG_CL),1) 14 INTEL_GCM_CLANG_CL = 1 15@@ -221,10 +221,10 @@ 16 DEFINES += -DMP_IS_LITTLE_ENDIAN 17 # DEFINES += -DMPI_AMD64_ADD 18 # comment the next four lines to turn off Intel HW acceleration. 19- DEFINES += -DUSE_HW_AES -DINTEL_GCM 20- ASFILES += intel-aes.s intel-gcm.s 21- EXTRA_SRCS += intel-gcm-wrap.c 22- INTEL_GCM = 1 23+ #DEFINES += -DUSE_HW_AES -DINTEL_GCM 24+ #ASFILES += intel-aes.s intel-gcm.s 25+ #EXTRA_SRCS += intel-gcm-wrap.c 26+ #INTEL_GCM = 1 27 MPI_SRCS += mpi_amd64.c mp_comba.c 28 endif 29 ifeq ($(CPU_ARCH),x86) 30